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author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2019-11-06 14:38:55 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-13 15:29:44 -0500 |
commit | 1da37801a8b0fffb024fea594c7f1d7867ed8aa0 (patch) | |
tree | e042bd66cb7c5be9a2fa52fdfdba795d9ad9f121 /drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h | |
parent | 3a2ce8d66a4b81cb6d3c6c61e3fb4d061fff0e38 (diff) | |
download | linux-1da37801a8b0fffb024fea594c7f1d7867ed8aa0.tar.gz linux-1da37801a8b0fffb024fea594c7f1d7867ed8aa0.tar.bz2 linux-1da37801a8b0fffb024fea594c7f1d7867ed8aa0.zip |
drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED
[Why]
DCN2 and DSC are stable enough to be build by default. So drop the flags.
[How]
Remove them using the unifdef tool. The following commands were executed
in sequence:
$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
In addition:
* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
* clk_mgr/clk_mgr.c: dc_clk_mgr_create()
* core/dc_resources.c: dc_create_resource_pool()
* dce/dce_dmcu.c: dcn20_*lock_phy()
* dce/dce_dmcu.c: dcn20_funcs
* dce/dce_dmcu.c: dcn20_dmcu_create()
* gpio/hw_factory.c: dal_hw_factory_init()
* gpio/hw_translate.c: dal_hw_translate_init()
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h index c0b93d51ca8d..351b387ad606 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h @@ -65,13 +65,11 @@ struct audio_clock_info { uint32_t cts_48khz; }; -#if defined(CONFIG_DRM_AMD_DC_DCN2_0) enum dynamic_metadata_mode { dmdata_dp, dmdata_hdmi, dmdata_dolby_vision }; -#endif struct encoder_info_frame { /* auxiliary video information */ @@ -90,9 +88,7 @@ struct encoder_info_frame { struct encoder_unblank_param { struct dc_link_settings link_settings; struct dc_crtc_timing timing; -#ifdef CONFIG_DRM_AMD_DC_DCN2_0 int opp_cnt; -#endif }; struct encoder_set_dp_phy_pattern_param { @@ -109,7 +105,6 @@ struct stream_encoder { enum engine_id id; }; -#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT struct enc_state { uint32_t dsc_mode; // DISABLED 0; 1 or 2 indicate enabled state. uint32_t dsc_slice_width; @@ -119,7 +114,6 @@ struct enc_state { uint32_t sec_gsp_pps_enable; uint32_t sec_stream_enable; }; -#endif struct stream_encoder_funcs { void (*dp_set_stream_attribute)( @@ -220,8 +214,6 @@ struct stream_encoder_funcs { enum dc_pixel_encoding *encoding, enum dc_color_depth *depth); -#if defined(CONFIG_DRM_AMD_DC_DCN2_0) -#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT void (*enc_read_state)(struct stream_encoder *enc, struct enc_state *s); void (*dp_set_dsc_config)( @@ -233,7 +225,6 @@ struct stream_encoder_funcs { void (*dp_set_dsc_pps_info_packet)(struct stream_encoder *enc, bool enable, uint8_t *dsc_packed_pps); -#endif void (*set_dynamic_metadata)(struct stream_encoder *enc, bool enable, @@ -243,7 +234,6 @@ struct stream_encoder_funcs { void (*dp_set_odm_combine)( struct stream_encoder *enc, bool odm_combine); -#endif }; #endif /* STREAM_ENCODER_H_ */ |