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| author | Yongqiang Sun <yongqiang.sun@amd.com> | 2020-05-27 13:57:55 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:21 -0400 |
| commit | ffa2151a8f4dab8670d46abcfacacbe68e394ae6 (patch) | |
| tree | 89fc63c17e1c6684c59458fe5441ea733a2f60de /drivers/gpu/drm/amd/display/dmub/src | |
| parent | a0a85ac4eac9b1560d9a40d6636f82f81162de10 (diff) | |
| download | linux-ffa2151a8f4dab8670d46abcfacacbe68e394ae6.tar.gz linux-ffa2151a8f4dab8670d46abcfacacbe68e394ae6.tar.bz2 linux-ffa2151a8f4dab8670d46abcfacacbe68e394ae6.zip | |
drm/amd/display: not reset dmub in driver.
[Why]
during S0i3, set power state is toggled a few times,
and dmub uC will restart with current reset/hw_init.
[How]
Remove reset in set power state, and before doing hw_init,
check if dmub is enabled, and doing FW autoload check only
if dmub is already enabled.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/src')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c index 1e03f6fdabd6..2c4a2fe9311d 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c @@ -275,7 +275,11 @@ void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) { - return REG_READ(DMCUB_REGION3_CW2_BASE_ADDRESS) != 0; + uint32_t is_hw_init; + + REG_GET(DMCUB_CNTL, DMCUB_ENABLE, &is_hw_init); + + return is_hw_init != 0; } bool dmub_dcn20_is_supported(struct dmub_srv *dmub) |