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| author | Alex Deucher <alexander.deucher@amd.com> | 2022-04-07 15:46:06 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-04-11 13:50:35 -0400 |
| commit | 1754cea1763e2bdc6a2153220440fe9aa9e0f2c9 (patch) | |
| tree | 486652b109b6b27f2ae3f521713dd284a0108f59 /drivers/gpu/drm/amd/display/modules | |
| parent | 6f90a49bc0c9a2d8590dea3323c9b0c61ee78add (diff) | |
| download | linux-1754cea1763e2bdc6a2153220440fe9aa9e0f2c9.tar.gz linux-1754cea1763e2bdc6a2153220440fe9aa9e0f2c9.tar.bz2 linux-1754cea1763e2bdc6a2153220440fe9aa9e0f2c9.zip | |
drm/amd/display: fix 64 bit divide in freesync code
Use div_u64() rather than a a 64 bit divide.
Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Angus Wang <Angus.Wang@amd.com>
Cc: Anthony Koo <Anthony.Koo@amd.com>
Cc: Aric Cyr <Aric.Cyr@amd.com>
Cc: Nathan Chancellor <nathan@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules')
| -rw-r--r-- | drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c index 0130f1879116..d2d76ce56f89 100644 --- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -1239,7 +1239,7 @@ void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync, if (in_out_vrr->supported == false) return; - cur_timestamp_in_us = dm_get_timestamp(core_freesync->dc->ctx)/10; + cur_timestamp_in_us = div_u64(dm_get_timestamp(core_freesync->dc->ctx), 10); in_out_vrr->flip_interval.vsyncs_between_flip++; in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us; |