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| author | Leo (Hanghong) Ma <hanghong.ma@amd.com> | 2021-03-04 10:26:52 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-03-05 15:10:49 -0500 |
| commit | c79fe9b436690209954f908a41b19e0bf575877a (patch) | |
| tree | 6ad52254ee00c2470c65dfb8e095e2ec4b323b8d /drivers/gpu/drm/amd/include/ivsrcid | |
| parent | d8cce9306801cfbf709055677f7896905094ff95 (diff) | |
| download | linux-c79fe9b436690209954f908a41b19e0bf575877a.tar.gz linux-c79fe9b436690209954f908a41b19e0bf575877a.tar.bz2 linux-c79fe9b436690209954f908a41b19e0bf575877a.zip | |
drm/amdgpu: add DMUB trace event IRQ source define
[Why & How]
We use DMCUB outbox0 interrupt to log DMCUB trace buffer events
as Linux kernel traces, so need to add some irq source related
defination in the header files;
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include/ivsrcid')
| -rw-r--r-- | drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h index ac9fa3a9bd07..e2bffcae273a 100644 --- a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h +++ b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h @@ -1130,5 +1130,7 @@ #define DCN_1_0__SRCID__HUBP6_FLIP_AWAY_INTERRUPT 0x63 // Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP6_IHC_FLIP_AWAY_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE17 Level / Pulse #define DCN_1_0__SRCID__HUBP7_FLIP_AWAY_INTERRUPT 0x64 // Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP7_IHC_FLIP_AWAY_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE17 Level / Pulse +#define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 0x68 +#define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 6 #endif // __IRQSRCS_DCN_1_0_H__ |