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authorLijo Lazar <lijo.lazar@amd.com>2023-10-06 13:49:03 +0530
committerAlex Deucher <alexander.deucher@amd.com>2023-11-29 16:49:35 -0500
commitaf39e6f4d8032b101907cc2ac12a21a778da568d (patch)
treecf7fe41d446c07b43f162d2c8b04cb4d0c3c88f1 /drivers/gpu/drm/amd/include
parent9a5095e785c38ab8d9f3d91f4ee76f4f73ec4adc (diff)
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drm/amdgpu: Add reg_state sysfs attribute
Add reg_state attribute to fetch the register snapshot of different IPs like XGMI, WAFL,PCIE and USR. To get a snapshot for a particular IP 1) Open the sysfs file 2) Seek to the offset as defined in amdgpu_sysfs_reg_offset 3) Read Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/amdgpu_reg_state.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/amdgpu_reg_state.h b/drivers/gpu/drm/amd/include/amdgpu_reg_state.h
index 3dbdb118db59..be519c8edf49 100644
--- a/drivers/gpu/drm/amd/include/amdgpu_reg_state.h
+++ b/drivers/gpu/drm/amd/include/amdgpu_reg_state.h
@@ -34,6 +34,15 @@ enum amdgpu_reg_state {
AMDGPU_REG_STATE_TYPE_USR_1 = 5
};
+enum amdgpu_sysfs_reg_offset {
+ AMDGPU_SYS_REG_STATE_XGMI = 0x0000,
+ AMDGPU_SYS_REG_STATE_WAFL = 0x1000,
+ AMDGPU_SYS_REG_STATE_PCIE = 0x2000,
+ AMDGPU_SYS_REG_STATE_USR = 0x3000,
+ AMDGPU_SYS_REG_STATE_USR_1 = 0x4000,
+ AMDGPU_SYS_REG_STATE_END = 0x5000,
+};
+
struct amdgpu_reg_state_header {
uint16_t structure_size;
uint8_t format_revision;
@@ -137,4 +146,8 @@ static inline size_t amdgpu_reginst_size(uint16_t num_inst, size_t inst_size,
(size)) : \
0)
+
+int amdgpu_reg_state_sysfs_init(struct amdgpu_device *adev);
+void amdgpu_reg_state_sysfs_fini(struct amdgpu_device *adev);
+
#endif