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author | Arunpravin <Arunpravin.PaneerSelvam@amd.com> | 2021-01-19 23:47:32 +0530 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-01-25 17:47:00 -0500 |
commit | eb3b425166cbdb942b7c38bd9998b97837bd6b29 (patch) | |
tree | 9f1f0ac896182efacdc682a377565a0e63f93f25 /drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | |
parent | 64dcf2f01d59cf9fad19b1a387bd39736a8f4d69 (diff) | |
download | linux-eb3b425166cbdb942b7c38bd9998b97837bd6b29.tar.gz linux-eb3b425166cbdb942b7c38bd9998b97837bd6b29.tar.bz2 linux-eb3b425166cbdb942b7c38bd9998b97837bd6b29.zip |
drm/amd/pm: store and reinstate swsmu user power configurations
store swsmu user power configurations which include
power limit, clock frequencies, fan speed and fan mode
on suspend and reinstate on resume.
V2: Addressed Lijo's review comments
added a function to set clock interdependencies
add check on fan control mode to reapply fan speed
V3: Addressed review comments from Alex
moved store logic and reinstate function call into swSMU
V4: added a logic to keep off storing configurations in suspend
V5: Addressed review comments from Lijo
add a restore flag
give restore priority to mclk comparing fclk and socclk
Signed-off-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h')
-rw-r--r-- | drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h index a087e00382e6..631a36a75ae3 100644 --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h @@ -33,6 +33,8 @@ #define SMU_TEMPERATURE_UNITS_PER_CENTIGRADES 1000 #define SMU_FW_NAME_LEN 0x24 +#define SMU_DPM_USER_PROFILE_RESTORE (1 << 0) + struct smu_hw_power_state { unsigned int magic; }; @@ -168,6 +170,17 @@ enum smu_memory_pool_size SMU_MEMORY_POOL_SIZE_2_GB = 0x80000000, }; +struct smu_user_dpm_profile { + uint32_t fan_mode; + uint32_t power_limit; + uint32_t fan_speed_rpm; + uint32_t flags; + + /* user clock state information */ + uint32_t clk_mask[SMU_CLK_COUNT]; + uint32_t clk_dependency; +}; + #define SMU_TABLE_INIT(tables, table_id, s, a, d) \ do { \ tables[table_id].size = s; \ @@ -473,6 +486,8 @@ struct smu_context uint32_t cpu_actual_soft_max_freq; uint32_t cpu_core_id_select; uint16_t cpu_core_num; + + struct smu_user_dpm_profile user_dpm_profile; }; struct i2c_adapter; |