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| author | Rex Zhu <Rex.Zhu@amd.com> | 2018-02-22 16:50:57 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-26 23:09:39 -0500 |
| commit | baeb7721b1a60ab86164ed746db522591c4540cb (patch) | |
| tree | 0b1cba5b82d11335f62ff7f0ea6e796636742384 /drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | |
| parent | bd58c48c1045728f80e6322636662aee99ab5fcd (diff) | |
| download | linux-baeb7721b1a60ab86164ed746db522591c4540cb.tar.gz linux-baeb7721b1a60ab86164ed746db522591c4540cb.tar.bz2 linux-baeb7721b1a60ab86164ed746db522591c4540cb.zip | |
drm/amd/pp: Add debug info when smu failed on Vega10
When smu msssage failed, print out return value in dmesg.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c index 0f76a54891e5..b4c487fb6a1d 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c @@ -83,13 +83,17 @@ static bool vega10_is_smc_ram_running(struct pp_hwmgr *hwmgr) static uint32_t vega10_wait_for_response(struct pp_hwmgr *hwmgr) { uint32_t reg; + uint32_t ret; reg = soc15_get_register_offset(MP1_HWID, 0, mmMP1_SMN_C2PMSG_90_BASE_IDX, mmMP1_SMN_C2PMSG_90); - phm_wait_for_register_unequal(hwmgr, reg, + ret = phm_wait_for_register_unequal(hwmgr, reg, 0, MP1_C2PMSG_90__CONTENT_MASK); + if (ret) + pr_err("No response from smu\n"); + return cgs_read_register(hwmgr->device, reg); } @@ -120,6 +124,7 @@ int vega10_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr, int vega10_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) { uint32_t reg; + uint32_t ret; vega10_wait_for_response(hwmgr); @@ -129,8 +134,9 @@ int vega10_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) vega10_send_msg_to_smc_without_waiting(hwmgr, msg); - if (vega10_wait_for_response(hwmgr) != 1) - pr_err("Failed to send message: 0x%x\n", msg); + ret = vega10_wait_for_response(hwmgr); + if (ret != 1) + pr_err("Failed to send message: 0x%x, ret value: 0x%x\n", msg, ret); return 0; } @@ -146,6 +152,7 @@ int vega10_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter) { uint32_t reg; + uint32_t ret; vega10_wait_for_response(hwmgr); @@ -159,8 +166,9 @@ int vega10_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, vega10_send_msg_to_smc_without_waiting(hwmgr, msg); - if (vega10_wait_for_response(hwmgr) != 1) - pr_err("Failed to send message: 0x%x\n", msg); + ret = vega10_wait_for_response(hwmgr); + if (ret != 1) + pr_err("Failed to send message: 0x%x, ret value: 0x%x\n", msg, ret); return 0; } |