diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2021-03-19 21:42:42 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-03-23 16:41:11 -0700 |
| commit | 005e95377249cb65133bf698926d0ab7876dddc3 (patch) | |
| tree | 27fe5658270ed29d805a52e9a47d54f5f8b30f13 /drivers/gpu/drm/i915/display/intel_bw.c | |
| parent | 01eb15c9165e4169c8637703b025371586d27fbb (diff) | |
| download | linux-005e95377249cb65133bf698926d0ab7876dddc3.tar.gz linux-005e95377249cb65133bf698926d0ab7876dddc3.tar.bz2 linux-005e95377249cb65133bf698926d0ab7876dddc3.zip | |
drm/i915/display: Eliminate most usage of INTEL_GEN()
Use Coccinelle to convert most of the usage of INTEL_GEN() and IS_GEN()
in the display code to use DISPLAY_VER() comparisons instead. The
following semantic patch was used:
@@ expression dev_priv, E; @@
- INTEL_GEN(dev_priv) == E
+ IS_DISPLAY_VER(dev_priv, E)
@@ expression dev_priv; @@
- INTEL_GEN(dev_priv)
+ DISPLAY_VER(dev_priv)
@@ expression dev_priv; expression E; @@
- IS_GEN(dev_priv, E)
+ IS_DISPLAY_VER(dev_priv, E)
@@
expression dev_priv;
expression from, until;
@@
- IS_GEN_RANGE(dev_priv, from, until)
+ IS_DISPLAY_RANGE(dev_priv, from, until)
There are still some display-related uses of INTEL_GEN() in intel_pm.c
(watermark code) and i915_irq.c. Those will be updated separately.
v2:
- Use new IS_DISPLAY_RANGE and IS_DISPLAY_VER helpers. (Jani)
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210320044245.3920043-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index d122b9965532..584ab5ce4106 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -77,7 +77,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv, qi->num_points = dram_info->num_qgv_points; - if (IS_GEN(dev_priv, 12)) + if (IS_DISPLAY_VER(dev_priv, 12)) switch (dram_info->type) { case INTEL_DRAM_DDR4: qi->t_bl = 4; @@ -89,7 +89,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv, qi->t_bl = 16; break; } - else if (IS_GEN(dev_priv, 11)) + else if (IS_DISPLAY_VER(dev_priv, 11)) qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8; if (drm_WARN_ON(&dev_priv->drm, @@ -271,9 +271,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv) icl_get_bw_info(dev_priv, &adls_sa_info); else if (IS_ROCKETLAKE(dev_priv)) icl_get_bw_info(dev_priv, &rkl_sa_info); - else if (IS_GEN(dev_priv, 12)) + else if (IS_DISPLAY_VER(dev_priv, 12)) icl_get_bw_info(dev_priv, &tgl_sa_info); - else if (IS_GEN(dev_priv, 11)) + else if (IS_DISPLAY_VER(dev_priv, 11)) icl_get_bw_info(dev_priv, &icl_sa_info); } @@ -533,7 +533,7 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) u32 mask = (1 << num_qgv_points) - 1; /* FIXME earlier gens need some checks too */ - if (INTEL_GEN(dev_priv) < 11) + if (DISPLAY_VER(dev_priv) < 11) return 0; for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, |