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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-03 21:12:05 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-21 17:56:03 +0200 |
| commit | 6731eb046cf71e30a79e60bae8ed31f5450928fa (patch) | |
| tree | d32492dbf9dee9094216d562bb6a0022c5bf6bc2 /drivers/gpu/drm/i915/display/intel_bw.c | |
| parent | 6c69d0bb9f15cdbc8fd6134e2c66438b69bb9581 (diff) | |
| download | linux-6731eb046cf71e30a79e60bae8ed31f5450928fa.tar.gz linux-6731eb046cf71e30a79e60bae8ed31f5450928fa.tar.bz2 linux-6731eb046cf71e30a79e60bae8ed31f5450928fa.zip | |
drm/i915: Properly write lock bw_state when it changes
The current code also forgets to call intel_atomic_lock_global_state()
when other stuff besides the final min_cdlck changes in the state.
That means we may throw away data which actually has changed, and
thus we can't be at all sure what the code ends up doing during
subsequent commits. Do the write lock properly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220303191207.27931-8-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 8155f2309f80..a0a69d8db132 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -678,6 +678,28 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state) return to_intel_bw_state(bw_state); } +static bool intel_bw_state_changed(struct drm_i915_private *i915, + const struct intel_bw_state *old_bw_state, + const struct intel_bw_state *new_bw_state) +{ + enum pipe pipe; + + for_each_pipe(i915, pipe) { + const struct intel_dbuf_bw *old_crtc_bw = + &old_bw_state->dbuf_bw[pipe]; + const struct intel_dbuf_bw *new_crtc_bw = + &new_bw_state->dbuf_bw[pipe]; + enum dbuf_slice slice; + + for_each_dbuf_slice(i915, slice) { + if (old_crtc_bw->used_bw[slice] != new_crtc_bw->used_bw[slice]) + return true; + } + } + + return old_bw_state->min_cdclk != new_bw_state->min_cdclk; +} + static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state, const struct intel_crtc_state *crtc_state) { @@ -765,7 +787,7 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state) new_bw_state->min_cdclk = DIV_ROUND_UP(max_bw, 64); - if (new_bw_state->min_cdclk != old_bw_state->min_cdclk) { + if (intel_bw_state_changed(dev_priv, old_bw_state, new_bw_state)) { int ret = intel_atomic_lock_global_state(&new_bw_state->base); if (ret) |