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author | Matt Roper <matthew.d.roper@intel.com> | 2021-03-19 21:42:42 -0700 |
---|---|---|
committer | Matt Roper <matthew.d.roper@intel.com> | 2021-03-23 16:41:11 -0700 |
commit | 005e95377249cb65133bf698926d0ab7876dddc3 (patch) | |
tree | 27fe5658270ed29d805a52e9a47d54f5f8b30f13 /drivers/gpu/drm/i915/display/intel_combo_phy.c | |
parent | 01eb15c9165e4169c8637703b025371586d27fbb (diff) | |
download | linux-005e95377249cb65133bf698926d0ab7876dddc3.tar.gz linux-005e95377249cb65133bf698926d0ab7876dddc3.tar.bz2 linux-005e95377249cb65133bf698926d0ab7876dddc3.zip |
drm/i915/display: Eliminate most usage of INTEL_GEN()
Use Coccinelle to convert most of the usage of INTEL_GEN() and IS_GEN()
in the display code to use DISPLAY_VER() comparisons instead. The
following semantic patch was used:
@@ expression dev_priv, E; @@
- INTEL_GEN(dev_priv) == E
+ IS_DISPLAY_VER(dev_priv, E)
@@ expression dev_priv; @@
- INTEL_GEN(dev_priv)
+ DISPLAY_VER(dev_priv)
@@ expression dev_priv; expression E; @@
- IS_GEN(dev_priv, E)
+ IS_DISPLAY_VER(dev_priv, E)
@@
expression dev_priv;
expression from, until;
@@
- IS_GEN_RANGE(dev_priv, from, until)
+ IS_DISPLAY_RANGE(dev_priv, from, until)
There are still some display-related uses of INTEL_GEN() in intel_pm.c
(watermark code) and i915_irq.c. Those will be updated separately.
v2:
- Use new IS_DISPLAY_RANGE and IS_DISPLAY_VER helpers. (Jani)
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210320044245.3920043-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_combo_phy.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_combo_phy.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c index c55813c6194a..5df57d16a401 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c @@ -278,7 +278,7 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, if (!icl_combo_phy_enabled(dev_priv, phy)) return false; - if (INTEL_GEN(dev_priv) >= 12) { + if (DISPLAY_VER(dev_priv) >= 12) { ret &= check_phy_reg(dev_priv, phy, ICL_PORT_TX_DW8_LN0(phy), ICL_PORT_TX_DW8_ODCC_CLK_SEL | ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK, @@ -401,7 +401,7 @@ static void icl_combo_phys_init(struct drm_i915_private *dev_priv) intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); skip_phy_misc: - if (INTEL_GEN(dev_priv) >= 12) { + if (DISPLAY_VER(dev_priv) >= 12) { val = intel_de_read(dev_priv, ICL_PORT_TX_DW8_LN0(phy)); val &= ~ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK; val |= ICL_PORT_TX_DW8_ODCC_CLK_SEL; @@ -473,7 +473,7 @@ skip_phy_misc: void intel_combo_phy_init(struct drm_i915_private *i915) { - if (INTEL_GEN(i915) >= 11) + if (DISPLAY_VER(i915) >= 11) icl_combo_phys_init(i915); else if (IS_CANNONLAKE(i915)) cnl_combo_phys_init(i915); @@ -481,7 +481,7 @@ void intel_combo_phy_init(struct drm_i915_private *i915) void intel_combo_phy_uninit(struct drm_i915_private *i915) { - if (INTEL_GEN(i915) >= 11) + if (DISPLAY_VER(i915) >= 11) icl_combo_phys_uninit(i915); else if (IS_CANNONLAKE(i915)) cnl_combo_phys_uninit(i915); |