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| author | Matt Roper <matthew.d.roper@intel.com> | 2020-10-06 17:22:08 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2020-10-07 13:51:23 -0700 |
| commit | 0642c2b837495b6c6b60349c0e4e1b4fe2bedc0a (patch) | |
| tree | 6802f83684ae774bd30a5f1ddaa9e4cf7cf5c712 /drivers/gpu/drm/i915/display/intel_combo_phy.c | |
| parent | fb7318c37afac6c6c7d18f893b3df962388cf763 (diff) | |
| download | linux-0642c2b837495b6c6b60349c0e4e1b4fe2bedc0a.tar.gz linux-0642c2b837495b6c6b60349c0e4e1b4fe2bedc0a.tar.bz2 linux-0642c2b837495b6c6b60349c0e4e1b4fe2bedc0a.zip | |
drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
The only bit we use in PHY_MISC is DE_IO_COMP_PWR_DOWN, and the bspec
details for that bit tell us that it need only be set for PHY-A and
PHY-B. It also turns out that there isn't even an instance of the
PHY_MISC register for PHY-D on this platform. Let's extend the EHL/RKL
logic that conditionally skips PHY_MISC usage to DG1 as well.
Bspec: 50107
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201007002210.3678024-6-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_combo_phy.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_combo_phy.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c index 157d8c8c605a..07c9fa2fb835 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c @@ -189,7 +189,8 @@ static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy) * other combo PHY's. */ if (IS_ELKHARTLAKE(i915) || - IS_ROCKETLAKE(i915)) + IS_ROCKETLAKE(i915) || + IS_DG1(i915)) return phy < PHY_C; return true; |