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authorMatt Roper <matthew.d.roper@intel.com>2021-03-19 21:42:42 -0700
committerMatt Roper <matthew.d.roper@intel.com>2021-03-23 16:41:11 -0700
commit005e95377249cb65133bf698926d0ab7876dddc3 (patch)
tree27fe5658270ed29d805a52e9a47d54f5f8b30f13 /drivers/gpu/drm/i915/display/intel_crtc.c
parent01eb15c9165e4169c8637703b025371586d27fbb (diff)
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drm/i915/display: Eliminate most usage of INTEL_GEN()
Use Coccinelle to convert most of the usage of INTEL_GEN() and IS_GEN() in the display code to use DISPLAY_VER() comparisons instead. The following semantic patch was used: @@ expression dev_priv, E; @@ - INTEL_GEN(dev_priv) == E + IS_DISPLAY_VER(dev_priv, E) @@ expression dev_priv; @@ - INTEL_GEN(dev_priv) + DISPLAY_VER(dev_priv) @@ expression dev_priv; expression E; @@ - IS_GEN(dev_priv, E) + IS_DISPLAY_VER(dev_priv, E) @@ expression dev_priv; expression from, until; @@ - IS_GEN_RANGE(dev_priv, from, until) + IS_DISPLAY_RANGE(dev_priv, from, until) There are still some display-related uses of INTEL_GEN() in intel_pm.c (watermark code) and i915_irq.c. Those will be updated separately. v2: - Use new IS_DISPLAY_RANGE and IS_DISPLAY_VER helpers. (Jani) Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210320044245.3920043-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_crtc.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_crtc.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 3248f49999bb..004ace523970 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -70,9 +70,9 @@ u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state)
(crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT)))
return 0;
- if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
+ if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
return 0xffffffff; /* full 32 bit counter */
- else if (INTEL_GEN(dev_priv) >= 3)
+ else if (DISPLAY_VER(dev_priv) >= 3)
return 0xffffff; /* only 24 bits of frame count */
else
return 0; /* Gen2 doesn't have a hardware frame counter */
@@ -265,7 +265,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
crtc->pipe = pipe;
crtc->num_scalers = RUNTIME_INFO(dev_priv)->num_scalers[pipe];
- if (INTEL_GEN(dev_priv) >= 9)
+ if (DISPLAY_VER(dev_priv) >= 9)
primary = skl_universal_plane_create(dev_priv, pipe,
PLANE_PRIMARY);
else
@@ -279,7 +279,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
for_each_sprite(dev_priv, pipe, sprite) {
struct intel_plane *plane;
- if (INTEL_GEN(dev_priv) >= 9)
+ if (DISPLAY_VER(dev_priv) >= 9)
plane = skl_universal_plane_create(dev_priv, pipe,
PLANE_SPRITE0 + sprite);
else
@@ -302,16 +302,16 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
if (IS_CHERRYVIEW(dev_priv) ||
IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv))
funcs = &g4x_crtc_funcs;
- else if (IS_GEN(dev_priv, 4))
+ else if (IS_DISPLAY_VER(dev_priv, 4))
funcs = &i965_crtc_funcs;
else if (IS_I945GM(dev_priv) || IS_I915GM(dev_priv))
funcs = &i915gm_crtc_funcs;
- else if (IS_GEN(dev_priv, 3))
+ else if (IS_DISPLAY_VER(dev_priv, 3))
funcs = &i915_crtc_funcs;
else
funcs = &i8xx_crtc_funcs;
} else {
- if (INTEL_GEN(dev_priv) >= 8)
+ if (DISPLAY_VER(dev_priv) >= 8)
funcs = &bdw_crtc_funcs;
else
funcs = &ilk_crtc_funcs;
@@ -327,7 +327,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
dev_priv->pipe_to_crtc_mapping[pipe] != NULL);
dev_priv->pipe_to_crtc_mapping[pipe] = crtc;
- if (INTEL_GEN(dev_priv) < 9) {
+ if (DISPLAY_VER(dev_priv) < 9) {
enum i9xx_plane_id i9xx_plane = primary->i9xx_plane;
BUG_ON(i9xx_plane >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
@@ -335,7 +335,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
dev_priv->plane_to_crtc_mapping[i9xx_plane] = crtc;
}
- if (INTEL_GEN(dev_priv) >= 10)
+ if (DISPLAY_VER(dev_priv) >= 10)
drm_crtc_create_scaling_filter_property(&crtc->base,
BIT(DRM_SCALING_FILTER_DEFAULT) |
BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR));
@@ -546,7 +546,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
* Incase of mipi dsi command mode, we need to set frame update
* request for every commit.
*/
- if (INTEL_GEN(dev_priv) >= 11 &&
+ if (DISPLAY_VER(dev_priv) >= 11 &&
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))
icl_dsi_frame_update(new_crtc_state);