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authorJosé Roberto de Souza <jose.souza@intel.com>2021-09-22 14:52:41 -0700
committerJosé Roberto de Souza <jose.souza@intel.com>2021-09-23 10:06:16 -0700
commit73262db68c27ed25452ffd3b57e051e1791de713 (patch)
treeb8e990a6e19076ad9aaff75a73888c77524caaea /drivers/gpu/drm/i915/display/intel_cursor.c
parent27493cb8747e8389a70a053445daf6a5c7888c3c (diff)
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drm/i915/display: Match PSR2 selective fetch sequences with specification
We were not completely following the selective fetch programming sequence, here some things we were doing wrong: - not programming plane selective fetch a PSR2_MAN_TRK_CTL registers when doing a modeset - programming PSR2_MAN_TRK_CTL out of vblank With this changes the last remainig underrun found in Alderlake-P is fixed. Bspec: 55229 Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210922215242.66683-2-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cursor.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cursor.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index c7618fef0143..901ad3a4c8c3 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -536,8 +536,10 @@ static void i9xx_update_cursor(struct intel_plane *plane,
if (DISPLAY_VER(dev_priv) >= 9)
skl_write_cursor_wm(plane, crtc_state);
- if (!intel_crtc_needs_modeset(crtc_state))
+ if (plane_state)
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, 0);
+ else
+ intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
if (plane->cursor.base != base ||
plane->cursor.size != fbc_ctl ||