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| author | Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> | 2020-02-03 01:06:28 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-02-05 19:16:57 +0200 |
| commit | 2570b7e3c56197e42c51d2df1ade511c3ff18190 (patch) | |
| tree | c547b3fb7462cdc674475db17682a9e7d206f7bf /drivers/gpu/drm/i915/display/intel_display_power.h | |
| parent | 85487cf4a1670bc2ba95238aaf9f8bf28dc9e7ac (diff) | |
| download | linux-2570b7e3c56197e42c51d2df1ade511c3ff18190.tar.gz linux-2570b7e3c56197e42c51d2df1ade511c3ff18190.tar.bz2 linux-2570b7e3c56197e42c51d2df1ade511c3ff18190.zip | |
drm/i915: Introduce parameterized DBUF_CTL
Now start using parameterized DBUF_CTL instead
of hardcoded, this would allow shorter access
functions when reading or storing entire state.
Tried to implement it in a MMIO_PIPE manner, however
DBUF_CTL1 address is higher than DBUF_CTL2, which
implies that we have to now subtract from base
rather than add.
v2: - Removed unneeded DBUF_CTL_DIST and DBUF_CTL_ADDR
macros. Started to use _PICK construct as suggested
by Matt Roper.
v3: - _DBUF_CTL_S* to DBUF_CTL_S*, changed X to "slice"
in macro(Ville Syrjälä)
- Introduced enum for enumerating DBUF slices(Ville Syrjälä)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200202230630.8975-5-stanislav.lisovskiy@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_power.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_power.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index 2608a65af7fa..601e000ffd0d 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -307,6 +307,11 @@ intel_display_power_put_async(struct drm_i915_private *i915, } #endif +enum dbuf_slice { + DBUF_S1, + DBUF_S2, +}; + #define with_intel_display_power(i915, domain, wf) \ for ((wf) = intel_display_power_get((i915), (domain)); (wf); \ intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0) |