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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-07-15 12:35:22 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-08-25 17:08:40 +0300 |
commit | 6205372b4b6dab7fc000a00c7703c68fe4cf5c8b (patch) | |
tree | 1ce6de45e33a92a819109da02256e236c37669c3 /drivers/gpu/drm/i915/display/intel_dpll.h | |
parent | 24951b5813c1d070f283bd9a0d97a76cd3f8ac54 (diff) | |
download | linux-6205372b4b6dab7fc000a00c7703c68fe4cf5c8b.tar.gz linux-6205372b4b6dab7fc000a00c7703c68fe4cf5c8b.tar.bz2 linux-6205372b4b6dab7fc000a00c7703c68fe4cf5c8b.zip |
drm/i915: Clean dpll calling convention
Stop passing both the crtc and its state to the DPLL functions.
The state alone is enough.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210715093530.31711-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll.h')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll.h | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.h b/drivers/gpu/drm/i915/display/intel_dpll.h index e2f845902abf..29f31075cdf0 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.h +++ b/drivers/gpu/drm/i915/display/intel_dpll.h @@ -19,27 +19,20 @@ int vlv_calc_dpll_params(int refclk, struct dpll *clock); int pnv_calc_dpll_params(int refclk, struct dpll *clock); int i9xx_calc_dpll_params(int refclk, struct dpll *clock); u32 i9xx_dpll_compute_fp(const struct dpll *dpll); -void vlv_compute_dpll(struct intel_crtc *crtc, - struct intel_crtc_state *pipe_config); -void chv_compute_dpll(struct intel_crtc *crtc, - struct intel_crtc_state *pipe_config); +void vlv_compute_dpll(struct intel_crtc_state *crtc_state); +void chv_compute_dpll(struct intel_crtc_state *crtc_state); int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, const struct dpll *dpll); void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe); -void i9xx_enable_pll(struct intel_crtc *crtc, - const struct intel_crtc_state *crtc_state); -void vlv_enable_pll(struct intel_crtc *crtc, - const struct intel_crtc_state *pipe_config); -void chv_enable_pll(struct intel_crtc *crtc, - const struct intel_crtc_state *pipe_config); +void i9xx_enable_pll(const struct intel_crtc_state *crtc_state); +void vlv_enable_pll(const struct intel_crtc_state *crtc_state); +void chv_enable_pll(const struct intel_crtc_state *crtc_state); void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); void i9xx_disable_pll(const struct intel_crtc_state *crtc_state); -void vlv_prepare_pll(struct intel_crtc *crtc, - const struct intel_crtc_state *pipe_config); -void chv_prepare_pll(struct intel_crtc *crtc, - const struct intel_crtc_state *pipe_config); +void vlv_prepare_pll(const struct intel_crtc_state *crtc_state); +void chv_prepare_pll(const struct intel_crtc_state *crtc_state); bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, struct dpll *best_clock); int chv_calc_dpll_params(int refclk, struct dpll *pll_clock); |