diff options
| author | Imre Deak <imre.deak@intel.com> | 2020-02-26 22:34:53 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2020-03-02 19:36:21 +0200 |
| commit | b953eb2153a34a113ec8f4c991390d36e5b00d4b (patch) | |
| tree | 5ef5b58ce288406ebde7fdac89dfd58e650e3784 /drivers/gpu/drm/i915/display/intel_dpll_mgr.h | |
| parent | 350ab42f973501d573f2e92c6f8a75b6b5a92e83 (diff) | |
| download | linux-b953eb2153a34a113ec8f4c991390d36e5b00d4b.tar.gz linux-b953eb2153a34a113ec8f4c991390d36e5b00d4b.tar.bz2 linux-b953eb2153a34a113ec8f4c991390d36e5b00d4b.zip | |
drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculation
Split out the PLL parameter->frequency conversion logic for each type of
PLL for symmetry with their corresponding inverse conversion functions.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-12-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index fadc240eccf6..5c847627580a 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -278,6 +278,9 @@ struct intel_shared_dpll_funcs { bool (*get_hw_state)(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll, struct intel_dpll_hw_state *hw_state); + + int (*get_freq)(struct drm_i915_private *i915, + const struct intel_shared_dpll *pll); }; /** @@ -372,8 +375,8 @@ void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state, void intel_update_active_dpll(struct intel_atomic_state *state, struct intel_crtc *crtc, struct intel_encoder *encoder); -int intel_dpll_get_freq(struct intel_encoder *encoder, - struct intel_crtc_state *crtc_state); +int intel_dpll_get_freq(struct drm_i915_private *i915, + const struct intel_shared_dpll *pll); void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state); @@ -384,7 +387,6 @@ void intel_dpll_sanitize_state(struct drm_i915_private *dev_priv); void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv, const struct intel_dpll_hw_state *hw_state); -int cnl_hdmi_pll_ref_clock(struct drm_i915_private *dev_priv); enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port); bool intel_dpll_is_combophy(enum intel_dpll_id id); |