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| author | Michał Winiarski <michal.winiarski@intel.com> | 2021-12-19 23:24:58 +0200 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-01-05 10:45:38 -0800 |
| commit | 59dc4632e35becca1186dbab83ac7cf8603afaa9 (patch) | |
| tree | de1dcdf60c2fac9287e14b0443053aecfe2e6dcf /drivers/gpu/drm/i915/display/intel_fbc.c | |
| parent | 5c24c9d227e9bbcba509752a32b3da5faa149aec (diff) | |
| download | linux-59dc4632e35becca1186dbab83ac7cf8603afaa9.tar.gz linux-59dc4632e35becca1186dbab83ac7cf8603afaa9.tar.bz2 linux-59dc4632e35becca1186dbab83ac7cf8603afaa9.zip | |
drm/i915/display: Use to_gt() helper for GGTT accesses
GGTT is currently available both through i915->ggtt and gt->ggtt, and we
eventually want to get rid of the i915->ggtt one.
Use to_gt() for all i915->ggtt accesses to help with the future
refactoring.
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211219212500.61432-5-andi.shyti@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index c40444206425..9208d52e3cec 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -395,7 +395,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) SNB_CPU_FENCE_ENABLE | params->fence_id); intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, params->fence_y_offset); - } else if (dev_priv->ggtt.num_fences) { + } else if (to_gt(dev_priv)->ggtt->num_fences) { intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0); intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0); } |