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| author | Matt Roper <matthew.d.roper@intel.com> | 2022-07-08 14:58:04 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-07-12 09:01:38 -0700 |
| commit | 81cb44274c654e49f55e6690079540b0bd177db0 (patch) | |
| tree | 6725e261a8bc061fcf5962f55fbad270b782a1a1 /drivers/gpu/drm/i915/display/intel_fbc.c | |
| parent | 75f664903d8672897333b86bb450335ec6486ad5 (diff) | |
| download | linux-81cb44274c654e49f55e6690079540b0bd177db0.tar.gz linux-81cb44274c654e49f55e6690079540b0bd177db0.tar.bz2 linux-81cb44274c654e49f55e6690079540b0bd177db0.zip | |
drm/i915: Add Wa_14016291713
We already disable FBC when PSR2 is enabled on display version 12 and
above; this new workaround now requires that we do the same with PSR1 on
display versions 12 and 13.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220708215804.2889246-2-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 8b807284cde1..33f52feb622a 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1097,6 +1097,12 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, return 0; } + /* Wa_14016291713 */ + if (IS_DISPLAY_VER(i915, 12, 13) && crtc_state->has_psr) { + plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)"; + return 0; + } + if (!pixel_format_is_valid(plane_state)) { plane_state->no_fbc_reason = "pixel format not supported"; return 0; |