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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-02-10 12:31:07 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-02-11 10:48:46 +0200 |
| commit | f7bc440bc79ae5dcf648b90209910ea8dba6ef0c (patch) | |
| tree | 3485fe26db09655fa5b870ac91fff192e60861ca /drivers/gpu/drm/i915/display/intel_fbc.c | |
| parent | a391e06958b2fe3f53171ba04f60dadf17b09d5b (diff) | |
| download | linux-f7bc440bc79ae5dcf648b90209910ea8dba6ef0c.tar.gz linux-f7bc440bc79ae5dcf648b90209910ea8dba6ef0c.tar.bz2 linux-f7bc440bc79ae5dcf648b90209910ea8dba6ef0c.zip | |
drm/i915/fbc: Fix the plane end Y offset check
We lost the required >>16 when I refactored the FBC plane state
checks. Bring it back so the check does what it's supposed to.
Cc: Mika Kahola <mika.kahola@intel.com>
Fixes: 2e6c99f88679 ("drm/i915/fbc: Nuke lots of crap from intel_fbc_state_cache")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220210103107.24492-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 465dc4e97ea8..3ec34de35460 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1125,7 +1125,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */ if (DISPLAY_VER(i915) >= 11 && - (plane_state->view.color_plane[0].y + drm_rect_height(&plane_state->uapi.src)) & 3) { + (plane_state->view.color_plane[0].y + + (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) { plane_state->no_fbc_reason = "plane end Y offset misaligned"; return false; } |