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| author | Anshuman Gupta <anshuman.gupta@intel.com> | 2020-08-05 17:15:21 +0530 |
|---|---|---|
| committer | Ramalingam C <ramalingam.c@intel.com> | 2020-08-26 16:41:32 +0530 |
| commit | 4fcee7be650c7f7c0581034b9cc4336190226abf (patch) | |
| tree | 59c5f7b8e3ee03c21e6b879a534beb6acbd64aea /drivers/gpu/drm/i915/display/intel_hdcp.c | |
| parent | dbda95809457875ded5d596acf929fc9de4d36c2 (diff) | |
| download | linux-4fcee7be650c7f7c0581034b9cc4336190226abf.tar.gz linux-4fcee7be650c7f7c0581034b9cc4336190226abf.tar.bz2 linux-4fcee7be650c7f7c0581034b9cc4336190226abf.zip | |
drm/i915/hdcp: No direct access to power_well desc
HDCP code doesn't require to access power_well internal stuff,
instead it should use the intel_display_power_well_is_enabled()
to get the status of desired power_well.
No functional change.
v2:
- used with_intel_runtime_pm instead of get/put. [Jani]
v3:
- rebased.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200805114521.867-3-anshuman.gupta@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_hdcp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_hdcp.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index a1e0d518e529..e76b049618db 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -148,9 +148,8 @@ static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *dig_port, static bool hdcp_key_loadable(struct drm_i915_private *dev_priv) { - struct i915_power_domains *power_domains = &dev_priv->power_domains; - struct i915_power_well *power_well; enum i915_power_well_id id; + intel_wakeref_t wakeref; bool enabled = false; /* @@ -162,17 +161,9 @@ static bool hdcp_key_loadable(struct drm_i915_private *dev_priv) else id = SKL_DISP_PW_1; - mutex_lock(&power_domains->lock); - /* PG1 (power well #1) needs to be enabled */ - for_each_power_well(dev_priv, power_well) { - if (power_well->desc->id == id) { - enabled = power_well->desc->ops->is_enabled(dev_priv, - power_well); - break; - } - } - mutex_unlock(&power_domains->lock); + with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) + enabled = intel_display_power_well_is_enabled(dev_priv, id); /* * Another req for hdcp key loadability is enabled state of pll for |