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author | Anshuman Gupta <anshuman.gupta@intel.com> | 2021-03-19 14:47:32 +0530 |
---|---|---|
committer | Anshuman Gupta <anshuman.gupta@intel.com> | 2021-03-22 11:27:40 +0530 |
commit | 50e945cbaa9ae188efc6a1a593f10874df89a4bb (patch) | |
tree | c5750de09722ae1f8501882d95a7ddd755116736 /drivers/gpu/drm/i915/display/intel_hdcp.c | |
parent | 053ffdd1641e0cb6840c6fab7a0ad8e001ea93b5 (diff) | |
download | linux-50e945cbaa9ae188efc6a1a593f10874df89a4bb.tar.gz linux-50e945cbaa9ae188efc6a1a593f10874df89a4bb.tar.bz2 linux-50e945cbaa9ae188efc6a1a593f10874df89a4bb.zip |
drm/i915/hdcp: mst streams type1 capability check
It requires to check streams type1 capability in mst topology
by checking Rxinfo instead connector HDCP2.x capability in
order to enforce type0 stream encryption in a mix of
HDCP {1.x,2.x} mst topology.
Rxcaps always shows HDCP 2.x capability of immediate downstream
connector. Let's use Rxinfo HDCP1_DEVICE_DOWNSTREAM bit to
detect a HDCP {1.x,2.x} mix mst topology.
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210319091732.17547-1-anshuman.gupta@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_hdcp.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_hdcp.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index ae1371c36a32..5b2e2625779b 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -32,6 +32,21 @@ static int intel_conn_to_vcpi(struct intel_connector *connector) return connector->port ? connector->port->vcpi.vcpi : 0; } +static bool +intel_streams_type1_capable(struct intel_connector *connector) +{ + const struct intel_hdcp_shim *shim = connector->hdcp.shim; + bool capable = false; + + if (!shim) + return capable; + + if (shim->streams_type1_capable) + shim->streams_type1_capable(connector, &capable); + + return capable; +} + /* * intel_hdcp_required_content_stream selects the most highest common possible HDCP * content_type for all streams in DP MST topology because security f/w doesn't @@ -70,7 +85,7 @@ intel_hdcp_required_content_stream(struct intel_digital_port *dig_port) if (conn_dig_port != dig_port) continue; - if (!enforce_type0 && !intel_hdcp2_capable(connector)) + if (!enforce_type0 && !intel_streams_type1_capable(connector)) enforce_type0 = true; data->streams[data->k].stream_id = intel_conn_to_vcpi(connector); |