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| author | Uma Shankar <uma.shankar@intel.com> | 2020-12-01 02:17:25 +0530 |
|---|---|---|
| committer | Uma Shankar <uma.shankar@intel.com> | 2020-12-02 01:22:28 +0530 |
| commit | 1a911350dd6c777b4a08ca60fe6e2249fd3c254a (patch) | |
| tree | 9c8f2b5e43b6a33e1709489c201b72be4b746a55 /drivers/gpu/drm/i915/display/intel_lspcon.h | |
| parent | 81cc320aa3592ee257d1a4a5d72124546f981dad (diff) | |
| download | linux-1a911350dd6c777b4a08ca60fe6e2249fd3c254a.tar.gz linux-1a911350dd6c777b4a08ca60fe6e2249fd3c254a.tar.bz2 linux-1a911350dd6c777b4a08ca60fe6e2249fd3c254a.zip | |
drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
Gen9 hardware supports HDMI2.0 through LSPCON chips.
Extending HDR support for MCA LSPCON based GEN9 devices.
SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic Range and
Mastering Infoframe (DRM packets) and send it to HDR capable
HDMI sink devices.
v2: Re-used hsw infoframe write implementation for HDR metadata
for LSPCON as per Ville's suggestion.
v3: Addressed Jani Nikula's review comments.
v4: Addressed Ville's review comments, removed redundant wrapper
and checks, passed arguments instead of hardcodings.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-3-uma.shankar@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_lspcon.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_lspcon.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index a19b3564c635..98043ba50dd4 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -32,5 +32,9 @@ void lspcon_set_infoframes(struct intel_encoder *encoder, const struct drm_connector_state *conn_state); u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config); +void hsw_write_infoframe(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type, + const void *frame, ssize_t len); #endif /* __INTEL_LSPCON_H__ */ |