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| author | José Roberto de Souza <jose.souza@intel.com> | 2020-11-30 04:57:50 -0800 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2020-12-01 09:14:58 -0800 |
| commit | efab47658a6c0fee7add0e5263e1fbc9a62cfa55 (patch) | |
| tree | 395a42791c8de2e1faa03e934d8aa7998d124e01 /drivers/gpu/drm/i915/display/intel_lspcon.h | |
| parent | 2939eb068289be2d14802deb4db6143bc84cc689 (diff) | |
| download | linux-efab47658a6c0fee7add0e5263e1fbc9a62cfa55.tar.gz linux-efab47658a6c0fee7add0e5263e1fbc9a62cfa55.tar.bz2 linux-efab47658a6c0fee7add0e5263e1fbc9a62cfa55.zip | |
drm/i915/display/psr: Calculate selective fetch plane registers
Add the calculations to set plane selective fetch registers depending
in the value of the area damaged.
It is still using the whole plane area as damaged but that will change
in next patches.
v2:
- fixed new_plane_state->uapi.dst.y2 typo in
intel_psr2_sel_fetch_update()
- do not shifthing new_plane_state->uapi.dst only src is in 16.16 format
BSpec: 55229
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130125750.17820-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_lspcon.h')
0 files changed, 0 insertions, 0 deletions