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author | Matt Roper <matthew.d.roper@intel.com> | 2021-03-19 21:42:40 -0700 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2021-03-23 16:36:42 -0700 |
commit | d47d29a622b605b8811617162ae5cc886f9123de (patch) | |
tree | 144fc83e0130d7c5a85de1b3625b6a20356da4be /drivers/gpu/drm/i915/display/intel_pipe_crc.c | |
parent | 5706d02871240fdba7ddd6ab1cc31672fc95a90f (diff) | |
download | linux-d47d29a622b605b8811617162ae5cc886f9123de.tar.gz linux-d47d29a622b605b8811617162ae5cc886f9123de.tar.bz2 linux-d47d29a622b605b8811617162ae5cc886f9123de.zip |
drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGE
ILK is the only platform that we consider "gen5" and SNB is the only
platform we consider "gen6." Add an IS_SANDYBRIDGE() macro and then
replace numeric platform tests for these two generations with direct
platform tests with the following Coccinelle semantic patch:
@@ expression dev_priv; @@
- IS_GEN(dev_priv, 5)
+ IS_IRONLAKE(dev_priv)
@@ expression dev_priv; @@
- IS_GEN(dev_priv, 6)
+ IS_SANDYBRIDGE(dev_priv)
@@ expression dev_priv; @@
- IS_GEN_RANGE(dev_priv, 5, 6)
+ IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv)
This will simplify our upcoming patches which eliminate INTEL_GEN()
usage in the display code.
v2:
- Reverse ilk/snb order for IS_GEN_RANGE conversion. (Ville)
- Rebase + regenerate from semantic patch
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210320044245.3920043-2-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_pipe_crc.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_pipe_crc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c index a9a5df2fee4d..7d8eaf8dfb98 100644 --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c @@ -415,7 +415,7 @@ static int get_new_crc_ctl_reg(struct drm_i915_private *dev_priv, return i9xx_pipe_crc_ctl_reg(dev_priv, pipe, source, val); else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) return vlv_pipe_crc_ctl_reg(dev_priv, pipe, source, val); - else if (IS_GEN_RANGE(dev_priv, 5, 6)) + else if (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv)) return ilk_pipe_crc_ctl_reg(source, val); else if (INTEL_GEN(dev_priv) < 9) return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val); @@ -545,7 +545,7 @@ intel_is_valid_crc_source(struct drm_i915_private *dev_priv, return i9xx_crc_source_valid(dev_priv, source); else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) return vlv_crc_source_valid(dev_priv, source); - else if (IS_GEN_RANGE(dev_priv, 5, 6)) + else if (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv)) return ilk_crc_source_valid(dev_priv, source); else if (INTEL_GEN(dev_priv) < 9) return ivb_crc_source_valid(dev_priv, source); |