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| author | Jani Nikula <jani.nikula@intel.com> | 2022-08-30 13:28:01 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2022-08-31 18:09:23 +0300 |
| commit | 3721d4fb763ed9f580d942f95b366c252c01633c (patch) | |
| tree | 5dcdd9e6d80bc7a2736cb3917a27c3813c86ff4c /drivers/gpu/drm/i915/display/vlv_dsi.c | |
| parent | 6d737d9bff5fe98e01bedb39ab9f5be3a39b5ddf (diff) | |
| download | linux-3721d4fb763ed9f580d942f95b366c252c01633c.tar.gz linux-3721d4fb763ed9f580d942f95b366c252c01633c.tar.bz2 linux-3721d4fb763ed9f580d942f95b366c252c01633c.zip | |
drm/i915/reg: stop using implicit dev_priv in DSPCLK_GATE_D
Remove the implicit dev_priv usage in DSPCLK_GATE_D register, and pass
it as parameter.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/41ca83573ca2d94bea568058f8cb8c35e814f8b1.1661855191.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/vlv_dsi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/vlv_dsi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index 233d0a8902ec..0bb4ac016345 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -822,9 +822,9 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, u32 val; /* Disable DPOunit clock gating, can stall pipe */ - val = intel_de_read(dev_priv, DSPCLK_GATE_D); + val = intel_de_read(dev_priv, DSPCLK_GATE_D(dev_priv)); val |= DPOUNIT_CLOCK_GATE_DISABLE; - intel_de_write(dev_priv, DSPCLK_GATE_D, val); + intel_de_write(dev_priv, DSPCLK_GATE_D(dev_priv), val); } if (!IS_GEMINILAKE(dev_priv)) @@ -998,9 +998,9 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state, vlv_dsi_pll_disable(encoder); - val = intel_de_read(dev_priv, DSPCLK_GATE_D); + val = intel_de_read(dev_priv, DSPCLK_GATE_D(dev_priv)); val &= ~DPOUNIT_CLOCK_GATE_DISABLE; - intel_de_write(dev_priv, DSPCLK_GATE_D, val); + intel_de_write(dev_priv, DSPCLK_GATE_D(dev_priv), val); } /* Assert reset */ |