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| author | Jani Nikula <jani.nikula@intel.com> | 2021-11-22 13:15:02 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-11-23 13:11:36 +0200 |
| commit | 01e526285a6a591900e7ed7266c1723fed366754 (patch) | |
| tree | c41abd5cc3e95c6bbd32b1abba795d0799dbc75e /drivers/gpu/drm/i915/display/vlv_dsi_pll.h | |
| parent | aebdd7428c65a8e2e96c1fd2fd89b4ab90bad913 (diff) | |
| download | linux-01e526285a6a591900e7ed7266c1723fed366754.tar.gz linux-01e526285a6a591900e7ed7266c1723fed366754.tar.bz2 linux-01e526285a6a591900e7ed7266c1723fed366754.zip | |
drm/i915/dsi: split out vlv_dsi_pll.h
Follow the convention of corresponding .h for .c.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211122111504.223248-2-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/vlv_dsi_pll.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/vlv_dsi_pll.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.h b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h new file mode 100644 index 000000000000..ab9291ad1e79 --- /dev/null +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2021 Intel Corporation + */ + +#ifndef __VLV_DSI_PLL_H__ +#define __VLV_DSI_PLL_H__ + +#include <linux/types.h> + +enum port; +struct drm_i915_private; +struct intel_crtc_state; +struct intel_encoder; + +int vlv_dsi_pll_compute(struct intel_encoder *encoder, + struct intel_crtc_state *config); +void vlv_dsi_pll_enable(struct intel_encoder *encoder, + const struct intel_crtc_state *config); +void vlv_dsi_pll_disable(struct intel_encoder *encoder); +u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, + struct intel_crtc_state *config); +void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); + +bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); +int bxt_dsi_pll_compute(struct intel_encoder *encoder, + struct intel_crtc_state *config); +void bxt_dsi_pll_enable(struct intel_encoder *encoder, + const struct intel_crtc_state *config); +void bxt_dsi_pll_disable(struct intel_encoder *encoder); +u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, + struct intel_crtc_state *config); +void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); + +void assert_dsi_pll_enabled(struct drm_i915_private *i915); +void assert_dsi_pll_disabled(struct drm_i915_private *i915); + +#endif /* __VLV_DSI_PLL_H__ */ |