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| author | José Roberto de Souza <jose.souza@intel.com> | 2019-10-25 17:13:23 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-10-29 12:12:49 -0700 |
| commit | 0f9ed3b2c9ecb727d6cea803def2998e1a6e625e (patch) | |
| tree | 1c93e380a8bed20747c9433f7629a13ef5661868 /drivers/gpu/drm/i915/intel_device_info.c | |
| parent | ee595888e1c25fb31bbc10a317a576311356babd (diff) | |
| download | linux-0f9ed3b2c9ecb727d6cea803def2998e1a6e625e.tar.gz linux-0f9ed3b2c9ecb727d6cea803def2998e1a6e625e.tar.bz2 linux-0f9ed3b2c9ecb727d6cea803def2998e1a6e625e.zip | |
drm/i915/display/cnl+: Handle fused off DSC
DSC could be fused off, so not all GEN10+ platforms will support it.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191026001323.216052-5-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index fa6464879142..a5b571364cf6 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -990,6 +990,10 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) if (INTEL_GEN(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE)) info->display.has_csr = 0; + + if (INTEL_GEN(dev_priv) >= 10 && + (dfsm & CNL_DFSM_DISPLAY_DSC_DISABLE)) + info->display.has_dsc = 0; } /* Initialize slice/subslice/EU info */ |