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author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-03-14 22:38:36 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-03-15 09:04:54 +0000 |
commit | cbecbccaa120fd976c2777ea80035675d6e39ec0 (patch) | |
tree | 0b78b08008d63f58ff18fda9c5ac9603f5e8d10d /drivers/gpu/drm/i915/intel_device_info.c | |
parent | ca6ac684de5d8091cca4b4eb78c54610101a0033 (diff) | |
download | linux-cbecbccaa120fd976c2777ea80035675d6e39ec0.tar.gz linux-cbecbccaa120fd976c2777ea80035675d6e39ec0.tar.bz2 linux-cbecbccaa120fd976c2777ea80035675d6e39ec0.zip |
drm/i915: Record platform specific ppGTT size in intel_device_info
As the maximum addressable bits is determined by platform, record that
information in our static chipset tables. This has the advantage of
being clearly recorded in our capability dumps for dmesg, debugfs and
error states.
Based on a patch by Bob Paauwe.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index aac19b1c419c..eddf83807957 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -844,7 +844,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) if (IS_GEN(dev_priv, 6) && intel_vtd_active()) { DRM_INFO("Disabling ppGTT for VT-d support\n"); - info->ppgtt = INTEL_PPGTT_NONE; + info->ppgtt_type = INTEL_PPGTT_NONE; } /* Initialize command stream timestamp frequency */ |