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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-03-31 14:12:01 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-03-31 17:28:58 +0200 |
commit | 1652d19e66c2dd118bd263ccba2a951b7946a2bb (patch) | |
tree | cf5a0a41a3449563308fb10e124ee3f0d96f0484 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 469d4b2a4ed7a255ffef31fad9d56bb6f7ac1213 (diff) | |
download | linux-1652d19e66c2dd118bd263ccba2a951b7946a2bb.tar.gz linux-1652d19e66c2dd118bd263ccba2a951b7946a2bb.tar.bz2 linux-1652d19e66c2dd118bd263ccba2a951b7946a2bb.zip |
drm/i915: Convert the ddi cdclk code to get_display_clock_speed
Unify the HSW/BDW/SKL cdclk extraction code to conform to the same
.get_display_clock_speed() mold that all the other platforms
use.
v2: Update due to SKL code getting added
v3: Rebase on top of -nightly (introduction of intel_audio.c) (Mika Kahola)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Add v3 note as suggested by Damien.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index fd9fc3c6a72c..7936155acbe8 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -717,7 +717,7 @@ static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) if (intel_dig_port->port == PORT_A) { if (index) return 0; - return DIV_ROUND_CLOSEST(intel_ddi_get_cdclk_freq(dev_priv), 2000); + return DIV_ROUND_CLOSEST(dev_priv->display.get_display_clock_speed(dev), 2000); } else if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) { /* Workaround for non-ULT HSW */ switch (index) { |