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| author | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:53:50 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:53:50 +0100 |
| commit | 0066f3b93e144762b409940fa37bb1cd36c1baf7 (patch) | |
| tree | 0c99b2754fb16c2a787bc1d086bd6fb268b12b1a /drivers/gpu/drm/i915/intel_pm.c | |
| parent | e65312fe868da53077780de618e213a53dc90d00 (diff) | |
| parent | b8ad0f912b93c23c34dfedc615a0eeba6ca29463 (diff) | |
| download | linux-0066f3b93e144762b409940fa37bb1cd36c1baf7.tar.gz linux-0066f3b93e144762b409940fa37bb1cd36c1baf7.tar.bz2 linux-0066f3b93e144762b409940fa37bb1cd36c1baf7.zip | |
Merge branch 'perf/urgent' into perf/core
Merge the latest fixes.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d77cc81900f9..e1fc35a72656 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3493,6 +3493,8 @@ static void valleyview_setup_pctx(struct drm_device *dev) u32 pcbr; int pctx_size = 24*1024; + WARN_ON(!mutex_is_locked(&dev->struct_mutex)); + pcbr = I915_READ(VLV_PCBR); if (pcbr) { /* BIOS set it up already, grab the pre-alloc'd space */ @@ -3542,8 +3544,6 @@ static void valleyview_enable_rps(struct drm_device *dev) I915_WRITE(GTFIFODBG, gtfifodbg); } - valleyview_setup_pctx(dev); - /* If VLV, Forcewake all wells, else re-direct to regular path */ gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL); @@ -4395,6 +4395,8 @@ void intel_enable_gt_powersave(struct drm_device *dev) ironlake_enable_rc6(dev); intel_init_emon(dev); } else if (IS_GEN6(dev) || IS_GEN7(dev)) { + if (IS_VALLEYVIEW(dev)) + valleyview_setup_pctx(dev); /* * PCU communication is slow and this doesn't need to be * done at any specific time, so do this out of our fast path |