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| author | Imre Deak <imre.deak@intel.com> | 2021-05-06 19:19:29 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2021-05-07 11:13:02 +0300 |
| commit | f6b044e4d9fb3b2b00681c96a3fc438e9c281ef2 (patch) | |
| tree | c752a08b31407a6510775f737b0af7b1a229c51d /drivers/gpu/drm/i915 | |
| parent | d3b4aa43eea3aebea51bfb02ca5ce93df0abc9c4 (diff) | |
| download | linux-f6b044e4d9fb3b2b00681c96a3fc438e9c281ef2.tar.gz linux-f6b044e4d9fb3b2b00681c96a3fc438e9c281ef2.tar.bz2 linux-f6b044e4d9fb3b2b00681c96a3fc438e9c281ef2.zip | |
drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs
The specification only requires DPT FB strides to be POT aligned, but
there seems to be also a minimum of 8 stride tile requirement. Scanning
out FBs with < 8 stride tiles will result in pipe faults (even though
the stride is POT aligned).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-10-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fb.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index 927440ed14f4..29c558fbb397 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -601,7 +601,11 @@ plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane, unsigned int pitch_tiles) { if (intel_fb_needs_pot_stride_remap(fb)) - return roundup_pow_of_two(pitch_tiles); + /* + * ADL_P, the only platform needing a POT stride has a minimum + * of 8 stride tiles. + */ + return roundup_pow_of_two(max(pitch_tiles, 8u)); else return pitch_tiles; } |