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| author | Rob Clark <robdclark@gmail.com> | 2013-11-16 12:56:06 -0500 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2014-01-09 14:38:58 -0500 |
| commit | 871d812aa43e6350a4edf41bf7cb0879675255f1 (patch) | |
| tree | a1700a8c806367a0f85b199f620aed2441277b8b /drivers/gpu/drm/msm/msm_gpu.h | |
| parent | bf2b33afb9ea1d9609767c70562610a686bdfbd7 (diff) | |
| download | linux-871d812aa43e6350a4edf41bf7cb0879675255f1.tar.gz linux-871d812aa43e6350a4edf41bf7cb0879675255f1.tar.bz2 linux-871d812aa43e6350a4edf41bf7cb0879675255f1.zip | |
drm/msm: add support for non-IOMMU systems
Add a VRAM carveout that is used for systems which do not have an IOMMU.
The VRAM carveout uses CMA. The arch code must setup a CMA pool for the
device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
cool). The user can configure the VRAM pool size using msm.vram module
param.
Technically, the abstraction of IOMMU behind msm_mmu is not strictly
needed, but it simplifies the GEM code a bit, and will be useful later
when I add support for a2xx devices with GPUMMU, so I decided to keep
this part.
It appears to be possible to configure the GPU to restrict access to
addresses within the VRAM pool, but this is not done yet. So for now
the GPU will refuse to load if there is no sort of mmu. Once address
based limits are supported and tested to confirm that we aren't giving
the GPU access to arbitrary memory, this restriction can be lifted
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 08d08420cbcc..458db8c64c28 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -78,7 +78,7 @@ struct msm_gpu { void __iomem *mmio; int irq; - struct iommu_domain *iommu; + struct msm_mmu *mmu; int id; /* Power Control: */ |