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author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-05-28 21:57:27 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-05-28 23:41:13 +0100 |
commit | 2010b7f0a8521fa7463056c8f077277a33a45c5f (patch) | |
tree | 2e208c278cceae94d9bd2717fd93a13a7a0a82e4 /drivers/gpu/drm | |
parent | ba03a63d76ac8131fad58c34fb793d18b0a8964c (diff) | |
download | linux-2010b7f0a8521fa7463056c8f077277a33a45c5f.tar.gz linux-2010b7f0a8521fa7463056c8f077277a33a45c5f.tar.bz2 linux-2010b7f0a8521fa7463056c8f077277a33a45c5f.zip |
drm/i915/gt: Start timeslice on partial submission
We may choose to only submit ELSP[0], even though we have sufficient
requests to fill the whole ELSP. Normally, we only start timeslicing if
we fill more than one port, but in this case we need to start
timeslicing for the queue that we choose not to submit.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200528205727.20309-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 69fff36ec0cc..6fc0966b75ff 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2358,8 +2358,10 @@ static void execlists_dequeue(struct intel_engine_cs *engine) if (last->context == rq->context) goto done; - if (i915_request_has_sentinel(last)) + if (i915_request_has_sentinel(last)) { + start_timeslice(engine, rq_prio(rq)); goto done; + } /* * If GVT overrides us we only ever submit |