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authorThierry Reding <treding@nvidia.com>2015-03-23 10:46:28 +0100
committerThierry Reding <treding@nvidia.com>2015-12-14 10:50:33 +0100
commita134789a67480e6cc7e50c9dfcbc7adca5016010 (patch)
treefaf701e52855836f342411e07dc6d636b67e4fe5 /drivers/gpu/host1x/dev.c
parente3e70814cebb0beec47dd38e60f89850950a2903 (diff)
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gpu: host1x: Add Tegra210 support
The host1x unit found in Tegra210 SoCs is very similar to the unit in Tegra124, but it has 2 additional channels for a total of 14 channels. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x/dev.c')
-rw-r--r--drivers/gpu/host1x/dev.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 64d9b707ee1a..314bf3718cc7 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -35,6 +35,7 @@
#include "hw/host1x01.h"
#include "hw/host1x02.h"
#include "hw/host1x04.h"
+#include "hw/host1x05.h"
void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
{
@@ -87,7 +88,17 @@ static const struct host1x_info host1x04_info = {
.sync_offset = 0x2100,
};
+static const struct host1x_info host1x05_info = {
+ .nb_channels = 14,
+ .nb_pts = 192,
+ .nb_mlocks = 16,
+ .nb_bases = 64,
+ .init = host1x05_init,
+ .sync_offset = 0x2100,
+};
+
static struct of_device_id host1x_of_match[] = {
+ { .compatible = "nvidia,tegra210-host1x", .data = &host1x05_info, },
{ .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, },
{ .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, },
{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },