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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-11-23 17:26:26 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-12-13 05:12:03 +0200 |
| commit | 07e176f2ad357a9371b9e9a80fc1c77016399ddf (patch) | |
| tree | f3b639ee33423acd636e3d31b7b99d9021366465 /drivers/gpu | |
| parent | 2357f2b271adf61e47426c7e5a94de1b65a51e42 (diff) | |
| download | linux-07e176f2ad357a9371b9e9a80fc1c77016399ddf.tar.gz linux-07e176f2ad357a9371b9e9a80fc1c77016399ddf.tar.bz2 linux-07e176f2ad357a9371b9e9a80fc1c77016399ddf.zip | |
drm/i915: Shorten GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED a bit
s/GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED/GAMMA_MODE_MODE_12BIT_MULTI_SEG/
to make this thing slightly shorter.
Also fix up the platform comment while at it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221123152638.20622-2-ville.syrjala@linux.intel.com
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 842d58da3128..956b221860e6 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1212,7 +1212,7 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state) case GAMMA_MODE_MODE_8BIT: ilk_load_lut_8(crtc, post_csc_lut); break; - case GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED: + case GAMMA_MODE_MODE_12BIT_MULTI_SEG: icl_program_gamma_superfine_segment(crtc_state); icl_program_gamma_multi_segment(crtc_state); ivb_load_lut_ext_max(crtc_state); @@ -2091,7 +2091,7 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state) else if (DISPLAY_VER(i915) >= 13) gamma_mode |= GAMMA_MODE_MODE_10BIT; else - gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED; + gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEG; return gamma_mode; } @@ -2283,7 +2283,7 @@ static int icl_post_csc_lut_precision(const struct intel_crtc_state *crtc_state) return 8; case GAMMA_MODE_MODE_10BIT: return 10; - case GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED: + case GAMMA_MODE_MODE_12BIT_MULTI_SEG: return 16; default: MISSING_CASE(crtc_state->gamma_mode); @@ -2455,7 +2455,7 @@ static bool icl_lut_equal(const struct intel_crtc_state *crtc_state, /* hw readout broken except for the super fine segment :( */ if ((crtc_state->gamma_mode & GAMMA_MODE_MODE_MASK) == - GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED) + GAMMA_MODE_MODE_12BIT_MULTI_SEG) check_size = 9; return intel_lut_equal(blob1, blob2, check_size, @@ -2971,7 +2971,7 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state) case GAMMA_MODE_MODE_10BIT: crtc_state->post_csc_lut = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); break; - case GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED: + case GAMMA_MODE_MODE_12BIT_MULTI_SEG: crtc_state->post_csc_lut = icl_read_lut_multi_segment(crtc); break; default: diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 168ef34d110b..ab39cfb14a19 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5315,7 +5315,7 @@ #define GAMMA_MODE_MODE_10BIT (1 << 0) #define GAMMA_MODE_MODE_12BIT (2 << 0) #define GAMMA_MODE_MODE_SPLIT (3 << 0) /* ivb-bdw */ -#define GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED (3 << 0) /* icl + */ +#define GAMMA_MODE_MODE_12BIT_MULTI_SEG (3 << 0) /* icl-tgl */ /* Display Internal Timeout Register */ #define RM_TIMEOUT _MMIO(0x42060) |