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| author | Yongqiang Sun <yongqiang.sun@amd.com> | 2020-11-04 14:26:38 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-16 12:19:33 -0500 |
| commit | 175f097149177ec97d8dd4fb5de673e99516be09 (patch) | |
| tree | b308e25ee7179188000904139668c0a1d2689628 /drivers/gpu | |
| parent | e26c9d80b830812b0fd4dc02cb9a6ac21ddc3bb0 (diff) | |
| download | linux-175f097149177ec97d8dd4fb5de673e99516be09.tar.gz linux-175f097149177ec97d8dd4fb5de673e99516be09.tar.bz2 linux-175f097149177ec97d8dd4fb5de673e99516be09.zip | |
drm/amd/display: Add dual edp optimization flag.
[Why & How]
Add a dual edp power optimization flag, so driver will
notify this flag to dmub FW to determine if apply the
power optimization.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 |
4 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 165fd2f3c80b..f522b664d3c6 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -2757,6 +2757,7 @@ bool dc_link_setup_psr(struct dc_link *link, * (Always set for DAL2, did not check ASIC) */ psr_context->allow_smu_optimizations = psr_config->allow_smu_optimizations; + psr_context->allow_multi_disp_optimizations = psr_config->allow_multi_disp_optimizations; /* Complete PSR entry before aborting to prevent intermittent * freezes on certain eDPs diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 86406b42572c..80757a0ea7c6 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -697,6 +697,7 @@ struct psr_config { bool psr_frame_capture_indication_req; unsigned int psr_sdp_transmit_line_num_deadline; bool allow_smu_optimizations; + bool allow_multi_disp_optimizations; }; union dmcu_psr_level { @@ -799,6 +800,7 @@ struct psr_context { */ unsigned int frame_delay; bool allow_smu_optimizations; + bool allow_multi_disp_optimizations; }; struct colorspace_transform { diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c index 0d6fe7c29c20..17e84f34ceba 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c @@ -261,6 +261,7 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub, // Misc copy_settings_data->psr_level = psr_context->psr_level.u32all; copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; + copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations; copy_settings_data->frame_delay = psr_context->frame_delay; copy_settings_data->frame_cap_ind = psr_context->psrFrameCaptureIndicationReq; copy_settings_data->init_sdp_deadline = psr_context->sdpTransmitLineNumDeadline; diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 9fd24f93a216..a980862f2543 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -613,7 +613,8 @@ struct dmub_cmd_psr_copy_settings_data { uint8_t smu_optimizations_en; uint8_t frame_delay; uint8_t frame_cap_ind; - uint8_t pad[3]; + uint8_t pad[2]; + uint8_t multi_disp_optimizations_en; uint16_t init_sdp_deadline; uint16_t pad2; }; |