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author | José Roberto de Souza <jose.souza@intel.com> | 2021-11-19 06:09:30 -0800 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2021-12-02 09:56:34 -0500 |
commit | 72641d8d60401a5f1e1a0431ceaf928680d34418 (patch) | |
tree | 71dd817e82cd3297d382bf241f588a86c8b8d0b0 /drivers/gpu | |
parent | a44f42ba7f1ad7d3c17bc7d91013fe814a53c5dc (diff) | |
download | linux-72641d8d60401a5f1e1a0431ceaf928680d34418.tar.gz linux-72641d8d60401a5f1e1a0431ceaf928680d34418.tar.bz2 linux-72641d8d60401a5f1e1a0431ceaf928680d34418.zip |
Revert "drm/i915: Implement Wa_1508744258"
This workarounds are causing hangs, because I missed the fact that it
needs to be enabled for all cases and disabled when doing a resolve
pass.
So KMD only needs to whitelist it and UMD will be the one setting it
on per case.
This reverts commit 28ec02c9cbebf3feeaf21a59df9dfbc02bda3362.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4145
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Fixes: 28ec02c9cbeb ("drm/i915: Implement Wa_1508744258")
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119140931.32791-1-jose.souza@intel.com
(cherry picked from commit f3799ff16fcfacd44aee55db162830df461b631f)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index e1f362530889..ed73d9bc9d40 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -621,13 +621,6 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, FF_MODE2_GS_TIMER_MASK, FF_MODE2_GS_TIMER_224, 0, false); - - /* - * Wa_14012131227:dg1 - * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p - */ - wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1, - GEN9_RHWO_OPTIMIZATION_DISABLE); } static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine, |