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| author | Xiang Liu <xiang.liu@amd.com> | 2025-03-21 20:47:23 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-03-26 17:44:27 -0400 |
| commit | f3f05a0ec584855c53f2d95024e23259f3ee101d (patch) | |
| tree | b5ff3f79915614f0b1721332d92fb312263da20a /drivers/gpu | |
| parent | 704bc361e3a4ead1c0eb40acc255b636b788dc89 (diff) | |
| download | linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.tar.gz linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.tar.bz2 linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.zip | |
drm/amdgpu: Use correct gfx deferred error count
In the case of parsing GFX deferred error from SMU corrected error
channel, the error count should be set to 1 instead of parsing from
MISC0 register, which is 0.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 736398b0d16d..3caac4a1564a 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -872,9 +872,10 @@ static int gfx_v9_4_3_aca_bank_parser(struct aca_handle *handle, break; case ACA_SMU_TYPE_CE: bank->aca_err_type = ACA_BANK_ERR_CE_DE_DECODE(bank); - ret = aca_error_cache_log_bank_error(handle, &info, - bank->aca_err_type, - ACA_REG__MISC0__ERRCNT(misc0)); + ret = aca_error_cache_log_bank_error(handle, &info, bank->aca_err_type, + (bank->aca_err_type == ACA_ERROR_TYPE_CE) ? + ACA_REG__MISC0__ERRCNT(misc0) : + 1); break; default: return -EINVAL; |