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authorSuraj Jitindar Singh <sjitindarsingh@gmail.com>2019-04-30 10:41:23 +1000
committerPaul Mackerras <paulus@ozlabs.org>2019-04-30 19:32:19 +1000
commit44b198aee1f2649534bdf08bfd7517c56da2ed7e (patch)
treef6b694a6df88e7c1eb0029c32da4e525becf1a73 /drivers/iommu/intel-pasid.h
parent70ea13f6e609e8762d9f57287ebf873a18c91a44 (diff)
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KVM: PPC: Book3S HV: Save/restore vrsave register in kvmhv_p9_guest_entry()
On POWER9 and later processors where the host can schedule vcpus on a per thread basis, there is a streamlined entry path used when the guest is radix. This entry path saves/restores the fp and vr state in kvmhv_p9_guest_entry() by calling store_[fp/vr]_state() and load_[fp/vr]_state(). This is the same as the old entry path however the old entry path also saved/restored the VRSAVE register, which isn't done in the new entry path. This means that the vrsave register is now volatile across guest exit, which is an incorrect change in behaviour. Fix this by saving/restoring the vrsave register in kvmhv_p9_guest_entry(). This restores the old, correct, behaviour. Fixes: 95a6432ce9038 ("KVM: PPC: Book3S HV: Streamlined guest entry/exit path on P9 for radix guests") Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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