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author | Christian Marangi <ansuelsmth@gmail.com> | 2024-06-26 18:00:11 +0200 |
---|---|---|
committer | Lee Jones <lee@kernel.org> | 2024-06-26 17:08:30 +0100 |
commit | 409a9dc53682b9f02793584d17721ab3e1b9c86f (patch) | |
tree | d94b96a6d40a729ce095ffaf5890543f5370eb3f /drivers/leds/leds-lp55xx-common.c | |
parent | 4d310b96f2db602830c40f82a75ede799b243cce (diff) | |
download | linux-409a9dc53682b9f02793584d17721ab3e1b9c86f.tar.gz linux-409a9dc53682b9f02793584d17721ab3e1b9c86f.tar.bz2 linux-409a9dc53682b9f02793584d17721ab3e1b9c86f.zip |
leds: leds-lp55xx: Generalize load_engine_and_select_page function
Generalize load_engine_and_select_page by reworking the implementation
and making it part of the generic load_engine function.
Add a new option in device_config, pages_per_engine used to define pages
assigned to each engine. With this option set, it's assumed LED chip
supports pages and load_engine will correctly setup the write page.
An equal amount of pages is assigned to each engine and they are
assigned from page 0.
Update any lp55xx based LED driver to define the option and use the new
function.
Suggested-by: Lee Jones <lee@kernel.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20240626160027.19703-7-ansuelsmth@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
Diffstat (limited to 'drivers/leds/leds-lp55xx-common.c')
-rw-r--r-- | drivers/leds/leds-lp55xx-common.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/leds/leds-lp55xx-common.c b/drivers/leds/leds-lp55xx-common.c index 3461158ad372..38564b9cda0d 100644 --- a/drivers/leds/leds-lp55xx-common.c +++ b/drivers/leds/leds-lp55xx-common.c @@ -46,6 +46,11 @@ #define LP55xx_MODE_ENGn_GET(n, mode, shift) \ (((mode) >> LP55xx_MODE_ENGn_SHIFT(n, shift)) & LP55xx_MODE_ENG_MASK) +/* Memory Page Selection */ +#define LP55xx_REG_PROG_PAGE_SEL 0x4f +/* If supported, each ENGINE have an equal amount of pages offset from page 0 */ +#define LP55xx_PAGE_OFFSET(n, pages) (((n) - 1) * (pages)) + /* External clock rate */ #define LP55XX_CLK_32K 32768 @@ -104,6 +109,11 @@ void lp55xx_load_engine(struct lp55xx_chip *chip) lp55xx_update_bits(chip, cfg->reg_op_mode.addr, mask, val); lp55xx_wait_opmode_done(chip); + + /* Setup PAGE if supported (pages_per_engine not 0)*/ + if (cfg->pages_per_engine) + lp55xx_write(chip, LP55xx_REG_PROG_PAGE_SEL, + LP55xx_PAGE_OFFSET(idx, cfg->pages_per_engine)); } EXPORT_SYMBOL_GPL(lp55xx_load_engine); |