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authorHans Verkuil <hverkuil-cisco@xs4all.nl>2021-08-11 13:36:54 +0200
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-09-30 10:07:54 +0200
commit7e360fa0c0f3e7dd1aa8f2b574d7b461d0caf5e2 (patch)
tree2ca92eaa2249eccd4e5d1c9e20daf6b354f0038a /drivers/media/cec
parent8515965e5e33f4feb56134348c95953f3eadfb26 (diff)
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media: cec-pin: fix off-by-one SFT check
The CEC pin framework has to wait for the CEC bus to be idle for the requested Signal Free Time before it can start a transmit. However, the check for that was off by one, so transmits would start one bit period (2.4ms) too late. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/cec')
-rw-r--r--drivers/media/cec/core/cec-pin.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/cec/core/cec-pin.c b/drivers/media/cec/core/cec-pin.c
index 8c613aa649c6..a60b6f03a6a1 100644
--- a/drivers/media/cec/core/cec-pin.c
+++ b/drivers/media/cec/core/cec-pin.c
@@ -957,7 +957,7 @@ static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
* so we can kick off the pending transmit.
*/
delta = ktime_us_delta(ts, pin->ts);
- if (delta / CEC_TIM_DATA_BIT_TOTAL >
+ if (delta / CEC_TIM_DATA_BIT_TOTAL >=
pin->tx_signal_free_time) {
pin->tx_nacked = false;
if (tx_custom_start(pin))
@@ -968,7 +968,7 @@ static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
cec_pin_low(pin);
break;
}
- if (delta / CEC_TIM_DATA_BIT_TOTAL >
+ if (delta / CEC_TIM_DATA_BIT_TOTAL >=
pin->tx_signal_free_time - 1)
pin->state = CEC_ST_TX_WAIT;
break;