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authorDmitry Osipenko <digetx@gmail.com>2018-12-12 23:38:55 +0300
committerJoerg Roedel <jroedel@suse.de>2019-01-16 13:54:12 +0100
commit45594c683ef780f20f11b1e0018b933b6ff5d9a1 (patch)
tree7160fd685824a20d2d7ace75e4c9dfa002b55029 /drivers/memory/tegra
parent59cd046f7f94543540d82216dbbfd8146db43b70 (diff)
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memory: tegra: Use relaxed versions of readl/writel
There is no need for inserting of memory barriers to access registers of Memory Controller. Hence use the relaxed versions of the accessors. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/memory/tegra')
-rw-r--r--drivers/memory/tegra/mc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index 9856f085e487..887a3b07334f 100644
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -26,13 +26,13 @@
static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
{
- return readl(mc->regs + offset);
+ return readl_relaxed(mc->regs + offset);
}
static inline void mc_writel(struct tegra_mc *mc, u32 value,
unsigned long offset)
{
- writel(value, mc->regs + offset);
+ writel_relaxed(value, mc->regs + offset);
}
extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common;