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| author | Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> | 2023-03-22 23:40:50 +0000 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-04-10 18:55:55 +0200 |
| commit | be4c5c6e84429e87cfdf1c8be350a49a714a93e2 (patch) | |
| tree | 600a8c19031f179fc633fe787c777bc2f24abdca /drivers/memory | |
| parent | 69d170c4c28ba0490bd42630cc09d7e1834bbb3d (diff) | |
| download | linux-be4c5c6e84429e87cfdf1c8be350a49a714a93e2.tar.gz linux-be4c5c6e84429e87cfdf1c8be350a49a714a93e2.tar.bz2 linux-be4c5c6e84429e87cfdf1c8be350a49a714a93e2.zip | |
memory: tegra: read values from correct device
When reading MR18 for Dev1 the code was incorrectly reading the
value corresponding to Dev0, so fix this by adjusting the index
according to the Tegra X1 TRM.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230322234050.47332-1-diogo.ivo@tecnico.ulisboa.pt
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'drivers/memory')
| -rw-r--r-- | drivers/memory/tegra/tegra210-emc-cc-r21021.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/tegra/tegra210-emc-cc-r21021.c b/drivers/memory/tegra/tegra210-emc-cc-r21021.c index cc76adb8d7e8..4cb608c71ead 100644 --- a/drivers/memory/tegra/tegra210-emc-cc-r21021.c +++ b/drivers/memory/tegra/tegra210-emc-cc-r21021.c @@ -277,7 +277,7 @@ static u32 update_clock_tree_delay(struct tegra210_emc *emc, int type) /* * Dev1 LSB. */ - value = tegra210_emc_mrr_read(emc, 2, 18); + value = tegra210_emc_mrr_read(emc, 1, 18); for (i = 0; i < emc->num_channels; i++) { temp[i][0] |= (value & 0x00ff) >> 0; |