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authorStephen Warren <swarren@nvidia.com>2013-11-05 14:10:53 -0700
committerStephen Warren <swarren@nvidia.com>2013-12-04 12:25:22 -0700
commit2f1d70af28a94988c1e8fba2ae03d4c7e68e690b (patch)
treee64da72f581414009ff50c27591483def90c3e05 /drivers/mfd/ucb1x00-core.c
parent354935a9e804878ec64a86ad8b7f091d544dcb54 (diff)
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ARM: tegra: don't hard-code DEBUG_LL baud rate
Stop writing to the UART clock divider registers in the Tegra DEBUG_LL code. This allows the DEBUG_LL output to use whatever baud rate was set up by the bootloader. Some users are using higher rates than 115200. This removes the only usage of tegra_uart_config[3], so reduce the size allocated for that array. Finally, fix busyuart() so that it only waits for THRE and not TEMT. For some reason, TEMT doesn't get asserted (at least on Tegra30 Beaver) at 9600 baud, even though it does at 115200 baud. This sounds like a HW bug, but I haven't investigated. For reference, U-Boot's serial code has always only checked THRE, and not checked TEMT. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Paul Walmsley <pwalmsley@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/mfd/ucb1x00-core.c')
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