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author | Daniel Borkmann <daniel@iogearbox.net> | 2017-06-07 13:45:37 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2017-06-07 15:27:20 -0400 |
commit | 7005cade1bdbb423413f8aafcbf17a1ec614a585 (patch) | |
tree | 77db17f9c82e93e483ff877ae2df8ef0fed79bcc /drivers/net/caif | |
parent | e173db36e3090d90651d97ab4bc45ace7f8cc0c6 (diff) | |
download | linux-7005cade1bdbb423413f8aafcbf17a1ec614a585.tar.gz linux-7005cade1bdbb423413f8aafcbf17a1ec614a585.tar.bz2 linux-7005cade1bdbb423413f8aafcbf17a1ec614a585.zip |
bpf, arm64: use separate register for state in stxr
Will reported that in BPF_XADD we must use a different register in stxr
instruction for the status flag due to otherwise CONSTRAINED UNPREDICTABLE
behavior per architecture. Reference manual says [1]:
If s == t, then one of the following behaviors must occur:
* The instruction is UNDEFINED.
* The instruction executes as a NOP.
* The instruction performs the store to the specified address, but
the value stored is UNKNOWN.
Thus, use a different temporary register for the status flag to fix it.
Disassembly extract from test 226/STX_XADD_DW from test_bpf.ko:
[...]
0000003c: c85f7d4b ldxr x11, [x10]
00000040: 8b07016b add x11, x11, x7
00000044: c80c7d4b stxr w12, x11, [x10]
00000048: 35ffffac cbnz w12, 0x0000003c
[...]
[1] https://static.docs.arm.com/ddi0487/b/DDI0487B_a_armv8_arm.pdf, p.6132
Fixes: 85f68fe89832 ("bpf, arm64: implement jiting of BPF_XADD")
Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/caif')
0 files changed, 0 insertions, 0 deletions