diff options
| author | SkyLake.Huang <skylake.huang@mediatek.com> | 2024-10-17 11:22:13 +0800 |
|---|---|---|
| committer | Andrew Lunn <andrew@lunn.ch> | 2024-10-20 11:06:47 -0500 |
| commit | 93a610c00ffd8b9c7c108039d894ddd5193b147e (patch) | |
| tree | 4c913d7df66e1b31eec2b04d4d3b465f873dfd5c /drivers/net/phy | |
| parent | b0f90a863ca5030fd074426b2b5095ef93f2c5bf (diff) | |
| download | linux-93a610c00ffd8b9c7c108039d894ddd5193b147e.tar.gz linux-93a610c00ffd8b9c7c108039d894ddd5193b147e.tar.bz2 linux-93a610c00ffd8b9c7c108039d894ddd5193b147e.zip | |
net: phy: mediatek-ge-soc: Propagate error code correctly in cal_cycle()
This patch propagates error code correctly in cal_cycle()
and improve with FIELD_GET().
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Diffstat (limited to 'drivers/net/phy')
| -rw-r--r-- | drivers/net/phy/mediatek-ge-soc.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/phy/mediatek-ge-soc.c b/drivers/net/phy/mediatek-ge-soc.c index 1d7719b6c351..a931832b1418 100644 --- a/drivers/net/phy/mediatek-ge-soc.c +++ b/drivers/net/phy/mediatek-ge-soc.c @@ -110,7 +110,7 @@ #define MTK_PHY_CR_TX_AMP_OFFSET_D_MASK GENMASK(6, 0) #define MTK_PHY_RG_AD_CAL_COMP 0x17a -#define MTK_PHY_AD_CAL_COMP_OUT_SHIFT (8) +#define MTK_PHY_AD_CAL_COMP_OUT_MASK GENMASK(8, 8) #define MTK_PHY_RG_AD_CAL_CLK 0x17b #define MTK_PHY_DA_CAL_CLK BIT(0) @@ -351,8 +351,10 @@ static int cal_cycle(struct phy_device *phydev, int devad, phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, MTK_PHY_DA_CALIN_FLAG); - ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >> - MTK_PHY_AD_CAL_COMP_OUT_SHIFT; + ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP); + if (ret < 0) + return ret; + ret = FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret); phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); return ret; |