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| author | Mukesh Sisodiya <mukesh.sisodiya@intel.com> | 2023-10-04 12:36:33 +0300 |
|---|---|---|
| committer | Johannes Berg <johannes.berg@intel.com> | 2023-10-23 12:21:48 +0200 |
| commit | 7dd7f99b17c3293c39cd75604f9d98549b819a0d (patch) | |
| tree | a85cbf9ca2df39d10c9e29eddf70b553298bbc2f /drivers/net/wireless/intel/iwlwifi | |
| parent | 048449fc666d736a1a17d950fde0b5c5c8fd10cc (diff) | |
| download | linux-7dd7f99b17c3293c39cd75604f9d98549b819a0d.tar.gz linux-7dd7f99b17c3293c39cd75604f9d98549b819a0d.tar.bz2 linux-7dd7f99b17c3293c39cd75604f9d98549b819a0d.zip | |
wifi: iwlwifi: fix the rf step and flavor bits range
The macros used to get the RF step and flavour are using
wrong bit range. Update the bit range for both macros.
Signed-off-by: Mukesh Sisodiya <mukesh.sisodiya@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20231004123422.cfd0aaaa5eb3.Ie2dd6c3a3062647f19cb5e888c46f0fdca103484@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'drivers/net/wireless/intel/iwlwifi')
| -rw-r--r-- | drivers/net/wireless/intel/iwlwifi/iwl-prph.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h index c1a94b01ce14..da035dbfbdb0 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h @@ -423,14 +423,14 @@ enum { * reserved: bits 12-18 * slave_exist: bit 19 * dash: bits 20-23 - * step: bits 24-26 - * flavor: bits 27-31 + * step: bits 24-27 + * flavor: bits 28-31 */ #define REG_CRF_ID_TYPE(val) (((val) & 0x00000FFF) >> 0) #define REG_CRF_ID_SLAVE(val) (((val) & 0x00080000) >> 19) #define REG_CRF_ID_DASH(val) (((val) & 0x00F00000) >> 20) -#define REG_CRF_ID_STEP(val) (((val) & 0x07000000) >> 24) -#define REG_CRF_ID_FLAVOR(val) (((val) & 0xF8000000) >> 27) +#define REG_CRF_ID_STEP(val) (((val) & 0x0F000000) >> 24) +#define REG_CRF_ID_FLAVOR(val) (((val) & 0xF0000000) >> 28) #define UREG_CHICK (0xA05C00) #define UREG_CHICK_MSI_ENABLE BIT(24) |