Merge branch 'pci/controller/qcom'

- Describe endpoint BAR0 and BAR2 as 64-bit only and BAR1 and BAR3 as
  RESERVED (Manivannan Sadhasivam)

- Add optional dma-coherent DT property for Qualcomm SA8775P (Dmitry
  Baryshkov)

- Make DT iommu property required for SA8775P and prohibited for SDX55
  (Dmitry Baryshkov)

- Add DT iommu and DMA-related properties for Qualcomm SM8450 (Dmitry
  Baryshkov)

- Consolidate DMA vs non-DMA cases in DT (Dmitry Baryshkov)

- Add endpoint DT properties for SAR2130P and enable endpoint mode in
  driver (Dmitry Baryshkov)

* pci/controller/qcom:
  PCI: qcom-ep: Enable EP mode support for SAR2130P
  dt-bindings: PCI: qcom-ep: Add SAR2130P compatible
  dt-bindings: PCI: qcom-ep: Consolidate DMA vs non-DMA cases
  dt-bindings: PCI: qcom-ep: Enable DMA for SM8450
  dt-bindings: PCI: qcom-ep: Describe optional IOMMU
  dt-bindings: PCI: qcom-ep: Describe optional dma-coherent property
  PCI: qcom-ep: Mark BAR0/BAR2 as 64bit BARs and BAR1/BAR3 as RESERVED

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
index c08f64d7a825..d1f777945680 100644
--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
@@ -825,6 +825,10 @@ static const struct pci_epc_features qcom_pcie_epc_features = {
 	.msi_capable = true,
 	.msix_capable = false,
 	.align = SZ_4K,
+	.bar[BAR_0] = { .only_64bit = true, },
+	.bar[BAR_1] = { .type = BAR_RESERVED, },
+	.bar[BAR_2] = { .only_64bit = true, },
+	.bar[BAR_3] = { .type = BAR_RESERVED, },
 };
 
 static const struct pci_epc_features *
@@ -933,6 +937,7 @@ static const struct of_device_id qcom_pcie_ep_match[] = {
 	{ .compatible = "qcom,sa8775p-pcie-ep", .data = &cfg_1_34_0},
 	{ .compatible = "qcom,sdx55-pcie-ep", },
 	{ .compatible = "qcom,sm8450-pcie-ep", },
+	{ .compatible = "qcom,sar2130p-pcie-ep", },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, qcom_pcie_ep_match);