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| author | Dinghao Liu <dinghao.liu@zju.edu.cn> | 2020-05-21 11:13:49 +0800 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-05-29 11:24:31 +0100 |
| commit | 1c1dbb2c02623db18a50c61b175f19aead800b4e (patch) | |
| tree | 5817e6275201d6485af568f7cd0c6f5afa0b245d /drivers/pci | |
| parent | 63605f1cfcc56bcb25c48bbee75a679d85ba7675 (diff) | |
| download | linux-1c1dbb2c02623db18a50c61b175f19aead800b4e.tar.gz linux-1c1dbb2c02623db18a50c61b175f19aead800b4e.tar.bz2 linux-1c1dbb2c02623db18a50c61b175f19aead800b4e.zip | |
PCI: tegra194: Fix runtime PM imbalance on error
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.
Link: https://lore.kernel.org/r/20200521031355.7022-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-tegra194.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index ae30a2fd3716..2c0d2ce16b47 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1623,7 +1623,7 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie) ret = pinctrl_pm_select_default_state(dev); if (ret < 0) { dev_err(dev, "Failed to configure sideband pins: %d\n", ret); - goto fail_pinctrl; + goto fail_pm_get_sync; } tegra_pcie_init_controller(pcie); @@ -1650,9 +1650,8 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie) fail_host_init: tegra_pcie_deinit_controller(pcie); -fail_pinctrl: - pm_runtime_put_sync(dev); fail_pm_get_sync: + pm_runtime_put_sync(dev); pm_runtime_disable(dev); return ret; } |