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| author | Krzysztof Wilczyński <kw@linux.com> | 2021-05-10 02:30:32 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-06-03 17:13:55 +0100 |
| commit | 42d7a8dc195f99e2e99d8f38a683e0852a29f6af (patch) | |
| tree | 65b533929cd33eb3c5e25da2749e10420fbb47ba /drivers/pci | |
| parent | 6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff) | |
| download | linux-42d7a8dc195f99e2e99d8f38a683e0852a29f6af.tar.gz linux-42d7a8dc195f99e2e99d8f38a683e0852a29f6af.tar.bz2 linux-42d7a8dc195f99e2e99d8f38a683e0852a29f6af.zip | |
PCI: mobiveil: Remove unused readl and writel functions
The PCIe host controller driver for Layerscape 4th generation SoC was
added in the commit d29ad70a813b ("PCI: mobiveil: Add PCIe Gen4 RC
driver for Layerscape SoCs").
At this time two static functions were introduced that appear to
currently have no users. Since nothing is using neither of these
functions at the moment they can be safely removed.
This resolves the following build time warnings:
drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c:45:19: warning: unused function 'ls_pcie_g4_lut_readl' [-Wunused-function]
drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c:50:20: warning: unused function 'ls_pcie_g4_lut_writel' [-Wunused-function]
Link: https://lore.kernel.org/r/20210510023032.3063932-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c index ee0156921ebc..306950272fd6 100644 --- a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c @@ -42,17 +42,6 @@ struct ls_pcie_g4 { int irq; }; -static inline u32 ls_pcie_g4_lut_readl(struct ls_pcie_g4 *pcie, u32 off) -{ - return ioread32(pcie->pci.csr_axi_slave_base + PCIE_LUT_OFF + off); -} - -static inline void ls_pcie_g4_lut_writel(struct ls_pcie_g4 *pcie, - u32 off, u32 val) -{ - iowrite32(val, pcie->pci.csr_axi_slave_base + PCIE_LUT_OFF + off); -} - static inline u32 ls_pcie_g4_pf_readl(struct ls_pcie_g4 *pcie, u32 off) { return ioread32(pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off); |